Certain complex problems may have optimum, but not perfect solutions. This apothegm seems to be particularly true in the field of multi-level printed circuit board design. Factors such as power, resistance, impedance, inductance and efficiency must be taken into consideration in every sophisticated PCB design. Often, one characteristic is improved at the expense of one or more other parameters.
In order to maximize 3-dimensional space available for circuitry, multi-layer PCBs have been used for many years. While ever greater sophistication in circuitry is desired and reflected in the signal planes of the board, it is well known that power and grounding considerations are also important.
In typical printed circuit boards, signal planes are sandwiched between power and ground planes. It has been found that undesirable electrical effects occur when too much distance separates power (voltage) planes from ground planes. These effects may be manifested, for example, in unacceptable delta-I switching noise, higher than acceptable input impedance, and unacceptable effective inductance.
Conventionally, one solution to this problem has been to provide additional power planes and ground planes in multi-layer PCBs. Voltage and/or ground planes will be referred to as "service" planes. It is not unusual, in fact, to find that power and ground planes outnumber signal planes in certain structures. The adverse consequence of adding power and ground planes is the increase of the manufacturing cost. Another solution is to reduce the separation between power and ground planes. But the requirement on the characteristic impedance of signal traces, which are typically placed between the power and ground planes, mandates that the separation between the power and ground planes cannot be smaller than a certain limit.
After the layout of signal traces on signal plane layers, signal plane layers are typically not fully populated, especially near the edges and corners of signal plane layers. The spare spaces on signal plane layers are sometimes utilized to place power and ground conductors. The power and ground conductors placed on the spare spaces on signal plane layers reduce the effective distance between the power distribution system and the ground distribution system, and therefore reduce the effective inductance of the power and ground supply systems. However, since the spare spaces on signal plane layers are typically near edges and corners, which are relatively far away from integrated circuit chips mounted on printed circuit boards, power and ground conductors placed on these spare spaces may not have significant effect on the improvement of the power and ground supply to integrated circuit chips.
Since the power and ground supply noise is mainly due to fast switching currents of integrated circuit devices inside integrated circuit chips, the power and ground supply noise in a printed circuit board is mainly originated from the area on which the integrated circuit chip is mounted. Therefore, the most critical area in a printed circuit board is the area on which the integrated circuit chip is mounted. Instead of placing power and ground conductors in spare spaces on the signal plane layers after the layout is completed, it would be of advantage to purposely detour the routing of signal traces to allow the placement of power and ground patches in the area right underneath the integrated circuit chips.